Leadership
Narbeh Derhacobian is a co-founder, President and CEO of Adesto Technologies. He has over 17 years of industry experience working on discrete and embedded memory technologies. He has held technical and managerial roles at SST, AMD, Virage Logic and Cswitch Corporations. Narbeh’s industrial experiences cover development and commercialization of split-gate NOR flash, ETOX NOR and NAND flash as well as SONOS based MirrorBit NOR flash technologies. He has over 40 granted patents in various areas of semiconductor memories. Narbeh has a PhD in Solid State Physics from UCLA, and an MBA from San Jose State University.
Ishai Naveh is a co-founder and the Vice President of Marketing and Business Development for Adesto Technologies. In his role, he is responsible for forging partnerships as well as positioning the company in growing, lucrative markets. Previously Mr. Naveh, was the VP of Marketing for Non-volatile Memories and Mixed Signal Technologies at Tower Semiconductor USA. Prior to arriving in the USA, he was Senior Director for foundry technologies at Tower. Mr. Naveh began his career at National Semiconductor, holding several positions in the USA and Israel. Mr. Naveh holds a B.Sc. from the Hebrew University and MBA from Heriott-Watt University. He has published several papers and issued over 10 patents.
Shane Hollmer is a co-founder of Adesto Technologies and currently serves as their Vice President of Engineering. Mr. Hollmer has more than 19 years of experience in the semiconductor memory industry including engineering and engineering management positions at Advanced Micro Devices, Emosyn, Silicon Storage Technology, and Monolithic Power Systems. Mr. Hollmer earned a B.S. degree in Electrical Engineering and Computer Sciences from the University of California, Berkeley and a MBA from San Jose State University. Shane holds more than 50 patents the areas of non-volatile memory development and mixed signal design.
Janet Wang is Vice President of Technology at Adesto Technologies. She has over 15 years of industry experience working on novel memory and semiconductor logic technology development and manufacturing. She has held engineering and managerial positions at Aerospace Corporation, Advanced Micro Devices, Transmeta Corporation, and Broadcom Corporation. She holds more than 25 patents in the areas of semiconductor memory and logic technologies. She was the recipient of the Best Paper Award at the 1997 International Reliability Physics Symposium and has served on technical committees for various conferences. Dr. Wang received her PhD in Electrical Engineering at the University of California, Los Angeles.
Michael Kozicki is Adesto’s Chief Scientist and Professor of Electrical Engineering at Arizona State University. Dr. Kozicki has over 25 years experience in industry and academia and is the inventor of the Programmable Metallization Cell, the scientific platform for Adesto’s CBRAM technology. He has published and presented extensively in nano-ionics and semiconductor science and currently holds around 40 US and 30 international patents in these areas. Dr. Kozicki graduated summa cum laude with a B.Sc and a Ph.D. in Electrical Engineering from the University of Edinburgh, Scotland.
Ravi Sunkavalli is the Vice President of Product Development at Adesto Technologies. Most recently, Dr Sunkavalli served as the Vice President of Hardware Engineering at Achronix Semiconductor where he was responsible for managing all aspects of product development including architecture, design, IP, systems and validation of advanced FPGA products in Intel's 22nm technology. He led several successful product development efforts at Achronix including the industry's first 65nm multi-GHz FPGAs incorporating 10Gbps SERDES technology. Prior to Achronix, Dr. Sunkavalli was Director of IC Design at Velogix. Dr Sunkavalli started his career at AMD where he contributed to successful development of multiple generations of flash memory technology. Dr. Sunkavalli also held engineering positions at Virage Logic and AMD in SRAM and microprocessor product groups. He holds 38 granted U.S. patents in flash memory and FPGA areas. Dr. Sunkavalli received his Ph.D in Electrical Engineering from North Carolina State University. He also holds a Bachelor of Science degree in Electrical Engineering from Indian Institute of Technology, Chennai.
Michael Van Buskirk is Chief Technology Officer of Adesto Technologies. Prior to joining Adesto, he served as Chief Operating Officer for Innovative Silicon, responsible for engineering and operations; and Chief Technology Officer for Spansion, responsible for overall technology strategy, product design and development, and future product architecture. Mr. Van Buskirk brings over 18 years international engineering, joint venture and, partnership management experience, while drawing on over 30 years semiconductor memory technology experience spanning SRAM, EPROM, E2PROM, floating gate and charge trap flash, resistive change memory (R-RAM), and capacitor-less DRAM. Notably, he spearheaded Spansion’s MirrorBit® technology, AMD’s Negative Gate Erase technology, AMD’s Simultaneous Read/Write architecture, and Innovative Silicon’s ultra-low voltage Z-RAM™ vertical floating body memory technology. Mr. Van Buskirk holds more than 70 U.S. patents in the field of semiconductor memory. He received a bachelor’s degree in electrical engineering from Oregon State University, where he serves on the College of Engineering Advisory Board and was inducted into their Academy of Distinguished Engineers.
