August 31, 2019 | Paul Hill
With any low-power design, the designer has the choice between choosing low-power components or switching off the power to peripheral devices. When considering the choice...
The world’s seemingly insatiable demand for ever-thinner mobile phones and ever-faster computers is driving a relentless reduction in silicon feature size. While this trend toward increased transistor counts on chips – popularly referred to as Moore’s law, after Intel founder Gordon Moore – has slowed in recent years, it continues. And, as ever more sophisticated chip fabrication facilities open up, Moore’s law has inevitably left the world with an oversupply of fabs that are not quite cutting-edge. System houses and device makers might at first dismiss this as outdated production technology, but in fact, it represents a tremendous opportunity for them to build better products at lower cost, which is just waiting to be harnessed.
For an increasing number of device makers, the best way to put a design into practice is custom silicon, a chip or chipset that you design to perfectly match your application requirements, in the most efficient way possible. However, most such projects raise the tough demand of integrating mixed analog and digital processing in a single system-on-chip (SoC) device. Traditionally, a mixed-signal SoC has been beyond the budget of all but the largest projects. But the ample availability of older process technology has changed this.
Research from Gartner shows how SoC development costs rise almost exponentially as you move closer to state-of-the-art chip manufacturing processes – with design and embedded software costs becoming increasingly punitive. What this exponential curve means is that there is a “sweet spot” where performance is still acceptable but the costs are very attractive. Currently, that price and performance sweet spot is in the 0.18 um to 65 nm range, but it naturally moves as the leading edge moves forward. At more mature production nodes, costs per chip are pushed down, almost to commodity pricing levels, by competition – and by the fact that flaws have long since been ironed out of the production process, so lead times are predictable.
What are the benefits of using more mature and economical manufacturers? Chief among them are BOM savings > 80%. Of course, using your own custom integrated chip brings many other benefits, including much smaller form factors, IP security, performance and efficiency. A custom silicon-based product can be differentiated in the market, and enjoy a longer profitable lifespan, by providing unique features that are difficult or impossible to achieve with standardized components, and difficult for competitors to reverse-engineer or copy.
A general lesson to take home from this is that you don’t always have to use leading-edge technology – and that lesson applies to many areas of the product design process, not just chip fabrication. There are a number of reasons that “the leading edge” is sometimes punningly referred to as “the bleeding edge” (among them are low yields and unforeseen production delays). But most of those reasons boil down to one thing: costs are far higher. This applies to more than production processes. For example, designers of mixed-mode silicon can use tried-and-tested pre-existing analog IP to realize huge cost savings.
Putting these ideas into practice and finding the ideal design and manufacturing partners for your project can be a challenge, but S3semi’s expertise and 20 years of experience in analog and mixed-signal integrated chip design can guide you through this process. S3semi can help you realize the remarkable cost savings offered by the world’s abundance of more economical production facilities, and take advantage of the performance, cost-effectiveness and competitive advantages of custom silicon.